Industrial Experience

2020 – Present: EPI – European Processor Initiative – a RISC-V top-to-bottom microprocessor initiative (Paris)

• Advisory board

2020 – Present: Speedata fast ETL processing (Netanya, Israel)

• Advisory board

2018 – Present: Hailo – Startup – Architecture for Machine Learning (TLV, Israel)

• Scientist: Architecture

2021 – Present: Synopsys – Silicon Lifetime Management – Dynamic system tuning optimization

• Consultant

2020 –2021: MOSAIK – a RISC-V European controller (Barcelona, San Francisco, Tel-Aviv)

• Co-founder

2016 – 2021: Concertio-Datarchs – startup – Dynamic system tuning optimization (NYC, TLV) – had been sold to Synopsys (Nov 8th, 2021)

• CSO – Chief Science Officer

2012 – 2018: TeraCom (startup – Terahertz communication)

• Consultant: On-die-Communication

2010 – 2018 ADSHIR (startup – Graphics)

• Co-Founder: Ray Tracing

2010 – 2012 We-Fi (startup – Wi-Fi)

• Senior Advisors: Strategy and solutions

2008 – 2011 Lucid (startup – graphics)

• Board of Advisors: Power analysis and advantages, new approach to CMP

2007 – 2013 NovaTrans (startup – devices)

• Senior Scientific and Technological Advisor

2007 – 2008 Commex-Technologies (startup – x86 chipsets)

• New X86 Platform approach – I/O Data content aware chipset
• CTO – Chief Technology Officer

1988 – 2006: Intel Corporation

• Intel, Israel (2002 – 2006), Petach-Tikva & Haifa, Israel
  Position: Director, Corporate Technology Group, Israel
  • Activities 2005-2006:
    – Accelerator Architecture research: based on application analysis. Define Streaming Media accelerator architecture to achieve high performance and performance/power figures
    – Member of Intel’s Fellow nomination committee
  • Activities 2002-2004:
    – Initiated Streaming Media Architecture advanced development activity. Outcome was the Asymmetric Cluster (cores) Chip MultiProcessors (ACCMP) and Accelerators concepts: e.g. Streaming/Media Co-processors cores adjacent (on the same die) to the main host cores. This includes the application analysis, usage model, cores architecture, Microarchitecture, Interconnect scheme, and SW model
• Intel, Israel (2001), Haifa & Petach-Tikva, Israel
  Position: Director, Strategic Investments, Intel Capital
  • Activities:
    – Heavy lifting deals: creating a spin-off in a new technological and business domain
    – Streaming Processing Initiative
• Intel, Texas Development Center (1999 – 2000), Austin, TX, USA
  Position: Co-Director of Intel’s Development Center (X86 high end MicroProcessor design) (200 engineers)
  • Activities:
    – Established a new design center from grounds up
    – Co-lead the establishment of the Development center’s Infrastructure (building, computing and communication), products (strategic planning), products Architecture and marketing, design methodologies, management structure, HR, Finance
    – Definition of the next X86 lead processor
    – Initiated and defined a new Streaming Co-Processor Architecture
    – Intel’s Fellow Nomination Committee
• Intel Israel, VLSI Design Center (1993 – 1998), Haifa, Israel
  Position: Director of Architecture and Planning Department (20 engineers)
  • Activities:
    – Architecture Definition of Pentium Extensions Products (Pentium with MMXTM Technology)
    – Driving X86 Processor’s Future Products Definition, Solutions, Analysis and Strategy
    – Definition of Intel’s Multimedia Architecture (MMXTM Technology)
    – Research Intel’s X86 new Processor’s Microarchitecture
    – Led a research and definition of a new MicroArchitecture concepts
    – Intel’s 1977 Innovation Day – member of the nominations committee
• Intel Santa Clara, MicroProcessor Group (1991 – 1992), Santa Clara,CA, USA
  Position: Manager, Platform Architecture Center, MicroProcessor Group (50 engineers)
  • Activities:
    – Leading Intel’s X86 future strategy, directions and analysis
    – Intel’s CPU and Cache strategies and future product roadmap
    – The group performed the initial definition of PCITM (Peripheral Components Interface)
    – Performance analysis of MicroProcessors
    – High Level Definition of Intel’s Chipsets
    – Intel’s X86 Processor research
• Intel Israel, VLSI Design Center (1988 – 1990), Haifa, Israel
  Position: MicroProcessor Architecture Group Manager (8 engineers)
  • Activities:
    – Initiation, concept definition and feasibility studies of Intel’s PentiumTM MicroProcessor
    – Defined X86 superscalar, branch predication and split Instruction and Data cache concepts
    – Analysis of Performance limitation of CISC MicroProcessor
    – Architecture definition of Cache Controller (C5/C8)
    – Architecture definition of new i860 family MicroProcessor

1984 – 1988: National Semiconductor VLSI Center (Israel), Herzelia, Israel

• Position: Chief Scientist (1988)
  • Activities:
    – Definition of on Die (Chip) protocols, Definition of VLSI Design Methodology
    – Conduct NS32532 MicroProcessor session in International Conference on Computer Design (ICCD)
• Position: NS32532 CPU Design Manager (1985 – 1987)
  • Activities:
    – Manage NS32532 CPU design (Architecture, design, circuit, layout)
    – NS 32532 Project management
    – NS32532 Architecture definition including Multiprocessing support
    – VLSI Circuit support (Standard & special cells, clock generators, sense amplifiers), layout integration
• Position: Computer Architecture Group Manager (1984)
  • Activities:
    – Performance evaluation
    – Multiplication, division algorithms for floating point arithmetic
    – Multicomputer research (in conjunction with the Technion)

1983 (Summer): Laboratory for Artificial Intelligence, Fairchild, Palo Alto, CA, USA

• Working with Professor Alan Davis on AI Architecture

1970 – 1984: Israel Armament Development Authority (RAFAEL), Israel Ministry of Defense, Haifa, Israel

1978 – 1981 Sabbatical for Ph.D studies and completion

• Position: System Engineer (1981 – 1984)
  • Activities:
    – Supervisor and advisor for the development of computer system for Command and Control
    – Design for System reliability, and security (encryption)
    – Project management, long-term planning
• Position: Group Manager (1975 – 1977)
  • Activities:
    – Research in the area of Fast Signal Measurement, Sampling, Fast A/D, transient Digitizer
    – Development and integration of high-resolution measurement and data recording system combining Analog and Digital equipment
• Position: Research Engineer (1972 – 1975)
  • Activities:
    – Very fast linear feedback Amplifier Analysis and development
    – Research: speed limitation of feedback amplifiers due to loop delay
    – Research: fast logarithmic amplifiers
• Position: Group Leader (Project Manager) (1970 – 1972)
  • Activities:
    – Design/Implementation of an Automatic Radio Frequency Interference (RFI) Test System (Digital and Analog)