Invited Talks & Presentations

Uri Weiser - Emeritus Professor
  • Where Accelerators Should Reside? memory subsystems – Process-in-Storage when?” Presentation at ADVA optical networking, Raanana, Israel, September 2016
  • Big Data Environment – Implications on Heterogeneous Computing” Invited talk at Marvel corporation Israel gathering, Bar Ilan University, Israel, September 2016
  • Location, location, location – where accelerators should reside?” In-Memory and In-Storage Computing with Emerging Technology workshop, in conjunction with PACT 2016, Haifa, Israel, September 2016
  • Potential future research in computing – Heterogeneous systems’ optimization” Invited talk SAMOS XVI Conference, Samos, Greece, July 2016
  • Lead, do not follow; Be a compass not a weathervane” IEEE/ACM Eckert-Mauchly award talk at ISCA 2016 Seoul, South Korea, June 2016
  • Handling Memory Accesses in Big Data Environment” Invited talk at ChipEx 2016 conference, Tel Aviv, May 2016
  • Pentium vs. ARM debate” panel discussion re-X86 vs. ARM with Prof. Steve Furber, ChipEx 2016 conference, Tel Aviv, May 2016
  • To Process-in-Storage, or not to Process-in-Storage? That is the question” presentation at a student meeting in UPC Barcelona, April 2016
  • A New Architecture Avenues in Big Data Environment” Invited talk at RoMoL 2016 workshop, Barcelona, March 2016
  • “Future Architecture Research – Big Data Environment” Invited talk at MIT, Boston, MN, July 2015
  • “Architecture Research in Big Data Environment” Invited talk at UCLA, Los Angeles, CA, February 2015
  • “Future Architecture Research Big Data Environment” Invited talk at Yale@75 Conference, Austin, TX September 2014
  • “Memory Driven Architecture: Flipping the Inequality Computing vs. Memory” Invited talk at Green Photonic Symposium at the Technion, April, 2014, Haifa Israel
  • “Memory Intensive Architecture – potential impact” Hewlett Packard, Apple, UCLA and Rochester Univ. September 2013
  • “The next frontier in Computer Architecture – Heterogeneous and Memory Intensive Architecture” Invited speaker at ISCA40, Tel Aviv, June 2013
  • “MultiAmdahl-how should I divide my Heterogeneous Chip?” HPCA Shenzhen China, February 2013 – best CAL paper session
  • “MicroProcessor – Trends and Future Directions”, invited talk at Hauwei, Shenzhen, China, November 2012
  • “Memory Intensive Architecture – the opportunity”, invited speaker at Memco Workshop, Frejus, France, November 2012
  • “The Next Opportunity; Memory based Architecture”, Invited speaker, Final, October 18 th, 2012
  • “Next Microprocessor Steps?”, invited talk at Columbia Univ, NYC, US, August 2012
  • “My Humble View of Microarchitecture: The Next Steps? and a Few Examples or Multitasking and Hetrogeneous Computing”, Invited speaker at MATEO, June 29th 2012, also at Columbia Univ. July 30th, 2012, Univ. of Utah, CS Dept., August 13th, 2012
  • “Memory Intensive Architecture”, Advanced Circuit Research Center, Technion (ACRC) Workshop, March 7th, 2012
  • “Heterogeneous Computing, the Inevitable Solution: Power Management, Scheduling Resource Divsion and ISA”, Intel/Technion/UCLA Meeting, February 14th, 2012
  • “Microprocessor Trends and Some Potential Ideas”, Marvell, Marvell, January 19 th, 2012
  • “A Personal View of Computing Past, Present and Future”, Invited talk at Final, October, 2011
  • “A Personal View of Israeli Academia and High Tech Industry – Past, Present and Future”, American Technion Society (ATS), August 2011
  • “CPU Roadmap: Multithreading and Heterogeneous Computing Power Implications”, Presentation to Huawei, July 21st, 2011
  • “The passion for Innovation Computer Architecture Examples”, Innovation Network, April 28th, 2011
  • “Multi-Core vs. Multi-thread, Case vs. non-Cashe, Homogeneous vs. Heterogeneous Systems Initial Thoughs”, Intel, Shanghai, November 18th, 2010
  • “Multi-Core vs. Multi-thread, Case vs. non-Cashe, Homogeneous vs. Heterogeneous Systems Initial Thoughs”, Fundan University, Beijing, China, November 17th, 2010
  • “Multi-Core vs. Multi-thread, Case vs. non-Cashe, Homogeneous vs. Heterogeneous Systems Initial Thoughs”, Tsinghua University, Beijing, China, November 15 th, 2010
  • “VLSI Processor’s Architecture – the challenges”, invited talk at the InterDisciplinary Center (IDC), Herzelia, CS4real lecture series, December 16th, 2009
  • “CMP and NUMA environments – new Computer Architecture challenges”, invited talk at University of Wisconsin, Madison, WI, June 18th, 2009
  • “Cache and/or Threads, MC vs. MT engines”, invited talk at Intel, Portland, OR, June 16th, 2009
  • “Asymmetric Applications and Hardware reciprocal”, talk at UC Berkeley, CA, PARLAB, EECS, June 15th, 2009
  • “Cache and/or Threads, MC vs. MT engines”, invited talk at nVidia, Santa Clara, CA, June 12th, 2009
  • “Asymmetric Chip Multi-Core – Applications and Processors – initial thoughts”, invited talk at the Princeton University, EE Colloquium, NJ, February 19th, 2009
  • “Asymmetric Chip Multi-Core – The future Chip Multiprocessor”, invited talk at the Alternative Computing Day, Ben Gurion University, Beer Sheva, Israel, February 9th, 2009
  • “Asymmetric Chip Multi-Processor – Applications, Processors and OS – Initial thoughts”, invited talk at the MultiCore Day: “The challenges of today and tomorrow”, Israel Ministry of Science Knowledge Center on CMP, Technion, Haifa Israel, February 3rd, 2009
  • “VLSI Processor’s Architecture”, invited talk at the Technion, undergraduate enrichment lecture series Haifa, Israel, January 8th, 2009
  • “Introducing Commex Technologies”, HP Lab, Haifa April 9th, 2008
  • “Asymmetric on die computation and Asymmetric IO services: environment and solutions”, invited talk at IBM Yorktown Heights, February 1st, 2008
  • “Content Aware Routing” Microsoft Platform evaluation group, December 19th, 2007
  • “Thunder – Commex Technology Overview”, Technology discussion, AMD, Austin , TX August 8th, 2007
  • “Decisions in Risk environment”, invited talk and Panel member, Synopsys Executive Event, Tel Aviv, Israel, May 1st, 2007
  • “Either innovate – or go to a place nobody is”, talk and Panel member, 2nd Innovation summit, Haifa, Israel, March 21st, 2007
  • “Symmetric vs. Asymmetric Chip Multi-Processor”, invited talk, Universidad Politecnica de Catalunya (UPC), Barcelona, Spain, February 14th, 2007
  • “Why not Symmetric Chip MultiProcessing” nVidia Colloquium, Santa Clara, CA. December 13rd, 2006
  • “Turning Brains into Bucks” Panel member, Conference Steering committee, Distributed & Multi-Computing session chair, The 1st Israel Innovation Summit, Haifa Israel, April 4th-5th, 2006
  • “The Intel Platform Revolution” Panel discussion, Intel’s Fellow Forum; Napa, CA, September 21st, 2005
  • “Continuing Moore’s law: The Special-Purpose Path: From Programmable Engines to Fixed Function Accelerators” Intel’s Fellow Forum; Napa, CA, September 21st, 2005
  • “Future direction in Microprocessors” Keynote Speaker, “Technology in Motion” Intel’s Mobility Vision; Tel-Aviv, Israel, May 30th, 2005
  • “The road not taken, or future direction in Microprocessor design”, Intel’s Mobility Group, Design Enrichment Seminar, Intel Haifa, May 22nd, 2005
  • “Is it the end of the Hard-Ware complexity era in Microprocessors” Keynote Speaker, Intel’s EMEA 10th Academic Forum; Gdansk, Poland, May 19th, 2005
  • “Microprocessors: Bypass the power wall (at least for a while)” Plenary Speaker, ICECS, 11th IEEE International Conference on Electronics, Circuits and Systems, Tel Aviv, Israel, December 14th, 2004
  • “Asymmetric Cluster Chip MultiProcessing (ACCMP)” Special Colloquium, Department of Electrical engineering, Tel Aviv University; November 22nd, 2004
  • “From Individual Contributor to Intel Fellow – a story at a glance”, invited talk, Intel Petach Tikva, Senior Technology Contributors Program – Israel, Kefar Vitkin, Israel; November 1st, 2004, also: Intel FAB8/FAB18, Jerusalem; June 28th, 2005
  • “The Road not Taken”, invited talk, 1st Technical Leadership Innovation Conference at Intel – Israel, Tel Aviv, Israel; October 17th, 2004
  • “The real life limitations of converged core” Panel member, Intel’s 3rd MicroArchitecture Forum, Barcelona, Spain, June 29th, 2004
  • “Streaming Facility for DLite IA32 Media – Optimized Light Weight Cores”, Intel’s 3rd MicroArchitecture Forum, Barcelona, Spain, June 28th, 2004 (Co-Author)
  • “Microprocessors: Extend Moore’s performance law within limited power envelop”, invited talk, Intel Bangalore, India, Innovation day, May 5th, 2004
  • “Microprocessor: Bypass the power wall”, invited talk, Intel’s EMEA 9th Academic Forum; Barcelona, Spain, April 21st, 2004
  • “Media extension to X86 family” Panel member, Intel’s Senior Technical staff meeting, November 19th, 2003
  • “Where should we go with Microarchitecture?” Panel member, Intel’s 2nd MicroArchitecture Forum, Santa Cruz, US, June 12th, 2003
  • “Microprocessors: Is Moore’s law ended? Do we hit a wall?”, invited talk, Intel’s EMEA 8th Academic Forum; Berlin, Germany, April 28th, 2003
  • “Microprocessors: Will Moore’s law continue?”, invited talk, Intel’s Symposium Performance Verification Technologies, Haifa, Technion Israel, June 25th, 2002
  • “PC Streaming Processing”, Intel’s 1st MicroArchitecture Forum, Mt Hood, Oregon, May 23rd, 2002
  • “Innovations in VLSI Architecture”, Invited talk, Universidad Politecnica de Catalunya (UPC), Barcelona, Spain, April 17th, 2002
  • “The Yearn for Specialized MIPS, a Proposed Solution”, invited talk, Universidad Politecnica de Catalunya (UPC), Barcelona, Spain, April 16th, 2002
  • “Innovations in Computer Architecture”, invited talk, EMEA 6th Intel Academic Forum; Istanbul, Turkey, September 6th, 2001
  • “MicroProcessor Architecture – How to reach the next Performance Step?”, invited talk, Intel’s Symposium on Logic and Validation Technologies; Haifa, Technion Israel, July 24th, 2001
  • “Specialized MIPS and Solutions”, invited talk, EMEA 5th Intel Academic Forum; Prague, September 13rd, 2000 also at Intel’s Fellow Forum; Portland, September 26th, 2000
  • “VLSI: Is it all about Integration and Performance? Trends and Directions”, invited talk, MIT VLSI Colloquium; November 2nd, 1999. also at Pasadena, Caltech; January 12th, 2000. Austin, University of Texas, ECE Colloquium; Boston, February 15th, 2000, also at the Technion EE Merlin Memorial Lecture, Haifa, April 5th, 2001
  • “VLSI MicroProcessor Architecture – Integration/performance Trends and Future Directions”, invited talk, ICCD Conference: Austin, Texas, October 12th, 1999
  • “MicroProcessor Architecture – What is next?”, invited talk, Intel’s Design Technology Conference: Santa Clara, CA, June 18th, 1999
  • “MicroProcessor Architecture, Trends and Directions”, Intel Distinguished Lectures in Europe; Cambridge, UK, July 16th, 1998, also at ILA (Israel Science Association) Conference, Haifa, Israel, June 27th, 1998
  • “Idea, Tradeoffs, Driving and Performance of Intel’s MMX™ Technology”, British Petroleum Innovation Colloquium; London, UK, July 29th, 1997
  • Panel member: “Synchronous vs. Asynchronous Design”, International Solid State and Circuit Conference, ISSCC97, San Francisco, CA, February 8th, 1997
  • Invited Lecture: “Future Directions in MicroProcessor Design”,
    • University of Utah (February 1996),
    • CALTEC; California Institute of Technology (February 1996),
    • Stanford (March 1996),
    • Technion (June 1996),
    • UCLA (February 1997),
      part of Intel’s 1996 Distinguished Lectures in Technology Series
  • Panel member: “Enhancement Host CPU Architecture for Multimedia”, MicroProcessor Forum Conference, San Jose, CA, October 1996
  • “Future Trends in MicroProcessor Architecture Design”, International Symposium on Advanced Research In Asynchronous Circuit and Systems, Aizu, Japan, March 1996 (lecture was given by Shai Rotem, due to unavailability of the lecturer)
  • “A New VLSI Design Methodology” Workshop on VLSI (NSF and IL-NCRD), Tiberias, Israel, May 1987