- Computer Architecture
- Memory Subsystem
- CMP Cache Architectures
- MultiCore vs. MuliThread Architectures
- Computer System Traffic Analysis
- Heterogeneous Systems
- Reduction of Data Movements
- Big Data Memory Access Patterns
- Ph.D.: Computer Science, University of Utah, 1981
- M.Sc.: Electrical Engineering, Technion, 1975
- B.Sc.: Electrical Engineering, Technion, 1970
Uri Weiser is a emeritus professor at the Electrical Engineering department of the Technion IIT. He is also active on the advisory boards of numerous startups.He earned his Ph.D in CS from the University of Utah, Salt Lake City.
Uri worked at Intel from 1988-2006 where he initiated and drove the definition of the first Pentium® processor, led the Intel’s MMX™ technology, co-invented the Trace Cache, co-managed Intel’s new Design Center at Austin, Texas and formed an advanced media applications research activity. Uri was appointed Intel Fellow; he is an ACM Fellow, and Fellow of the IEEE.
Prior to his career at Intel, Uri Weiser worked at the Israeli Department of Defense and later with National Semiconductor Design Center in Israel, where he led the design of the NS32532 microprocessor.